Stanford Root

Schedule

Stanford Root

Schedule

EE 311

Advanced Integrated Circuits Technology

UNITS:3
GRADING:Letter or Credit/No Credit
LEVEL:Graduate
GER:—

What are the practical and fundamental limits to the evolution of the technology of modern MOS devices and interconnects? How are modern devices and circuits fabricated and what future changes are likely? Advanced techniques and models of MOS devices and back-end (interconnect and contact) processing. What are future device structures and materials to maintain progress in integrated electronics? MOS front-end and back-end process integration.

Syllabus for selected term:
View Spring 2027 Syllabus

Sections

1 Term
Lecture 1Open
ID: 25033
0 / 999 enrolled
DAYS:TBD
TIME:TBD
LOCATION:TBD
3units

EE 311: Advanced Integrated Circuits Technology

3 units · Letter or Credit/No Credit

What are the practical and fundamental limits to the evolution of the technology of modern MOS devices and interconnects? How are modern devices and circuits fabricated and what future changes are likely? Advanced techniques and models of MOS devices and back-end (interconnect and contact) processing. What are future device structures and materials to maintain progress in integrated electronics? MOS front-end and back-end process integration.

Offered in Spring 2027 at Stanford University.

Spring 2027 sections

  • Lecture — TBA TBA (Graduate)

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