The design of integrated digital systems encompassing both customized software and hardware. Software/hardware design tradeoffs. Algorithm design for pipelining and parallelism. System latency and throughput tradeoffs. FPGA optimization techniques. Integration with external systems and smart devices. Firmware configuration and embedded system considerations. Enrollment limited to EE 25; preference to graduating seniors.
4 units · Letter or Credit/No Credit · GER: WIM
The design of integrated digital systems encompassing both customized software and hardware. Software/hardware design tradeoffs. Algorithm design for pipelining and parallelism. System latency and throughput tradeoffs. FPGA optimization techniques. Integration with external systems and smart devices. Firmware configuration and embedded system considerations. Enrollment limited to 25; preference to graduating seniors.
Offered in Spring 2026 at Stanford University.