Digital circuit, logic, and system design. Digital representation of information. CMOS logic circuits. Combinational logic design. Logic building blocks, idioms, and structured design. Sequential logic design and timing analysis. Clocks and synchronization. Finite state machines. Microcode control. Digital system design. Control and datapath partitioning. Lab. *In Autumn, enrollment preference is given to EE majors. Any EE majors who must enroll in Autumn are invited to contact the instructor. Formerly EE 108A.
5 units · Letter or Credit/No Credit · GER: WAY-AQR, WAY-SMA
Digital circuit, logic, and system design. Digital representation of information. CMOS logic circuits. Combinational logic design. Logic building blocks, idioms, and structured design. Sequential logic design and timing analysis. Clocks and synchronization. Finite state machines. Microcode control. Digital system design. Control and datapath partitioning. Lab. *In Autumn, enrollment preference is given to EE majors. Any EE majors who must enroll in Autumn are invited to contact the instructor. Formerly EE 108A.
Offered in Autumn 2025, Winter 2026 at Stanford University.